In the case of conventional memory devices, in particular conventional semiconductor memory devices, one differentiates between functional memory devices (e.g., PLAs, PALs, etc.) and table memory devices, e.g., ROM devices (ROM=Read Only Memory)—in particular PROMs, EPROMs, EEPROMs, flash memories, etc.—, and RAM devices (RAM=Random Access Memory or read-write memory), e.g., DRAMs and SRAMs.
A RAM device is a memory for storing data under a predetermined address and for reading out the data under this address later.
Since it is intended to accommodate as many memory cells as possible in a RAM device, one has been trying to realize same as simple as possible.
In the case of SRAMs (SRAM=Static Random Access Memory), the individual memory cells consist e.g. of few, for instance 6, transistors, and in the case of so-called DRAMs (DRAM=Dynamic Random Access Memory) in general only of one single, correspondingly controlled capacitive element (e.g. the gate-source capacitance of a MOSFET) with the capacitance of which one bit each can be stored as charge.
This charge, however, remains for a short time only. Therefore, a so-called “refresh” must be performed regularly, e.g., approximately every 64 ms.
In contrast to that, no “refresh” has to be performed in the case of SRAMs, i.e., the data stored in the memory cell remain stored as long as an appropriate supply voltage is fed to the SRAM.
In the case of non-volatile memory devices (NVMs), e.g., EPROMs, EEPROMs, and flash memories, the stored data remain, however, stored even when the supply voltage is switched off.
Furthermore, so-called resistive or resistively switching memory devices have also become known recently, e.g., so-called Phase Change Memories, etc.
In the case of resistive or resistively switching memory devices, an “active” material—which is, for instance, positioned between two appropriate electrodes (i.e. an anode and a cathode)—is placed, by appropriate switching processes, in a more or less conductive state (wherein e.g., the more conductive state corresponds to a stored, logic “one”, and the less conductive state to a stored, logic “zero”, or vice versa).
In the case of Phase Change Memories, for instance, an appropriate chalcogenide compound may be used as an “active” material that is positioned between two corresponding electrodes (e.g., a Ge—Sb—Te or an Ag—In—Sb—Te compound).
The chalcogenide compound material is adapted to be placed in an amorphous, i.e., relatively weakly conductive, or a crystalline, i.e., relatively strongly conductive state by appropriate switching processes (wherein, e.g., the relatively strongly conductive state may, for instance, correspond to a stored, logic “One”, and the relatively weakly conductive state may correspond to a stored, logic “Zero”, or vice versa).
Phase change memory cells are, for instance, known from G. Wicker, Nonvolatile, High Density, High Performance Phase Change Memory, SPIE Conference on Electronics and Structures for MEMS, Vol. 3891, Queensland, 2, 1999, and e.g., from Y. N. Hwang et al., Completely CMOS Compatible Phase Change Nonvolatile RAM Using NMOS Cell Transistors, IEEE Proceedings of the Nonvolatile Semiconductor Memory Workshop, Monterey, 91, 2003, S. Lai et al., OUM-a 180 nm nonvolatile memory cell element technology for stand alone and embedded applications, IEDM 2001, etc.
In order to achieve, with a corresponding memory cell, a change from an amorphous, i.e., a relatively weakly conductive state of the “active” material, to a crystalline, i.e., relatively strongly conductive state, an appropriate heating current pulse can be applied to the electrodes, heating current pulse leading to the “active” material being heated beyond the crystallization temperature and crystallizing (“writing process”).
Vice versa, a change of state of the “active” material from a crystalline, i.e., relatively strongly conductive state, to an amorphous, i.e., relatively weak conductive state, may, for instance, be achieved by—again by means of an appropriate heating current pulse—the “active” material being heated beyond the melting temperature and being subsequently “quenched” to an amorphous state by quick cooling (“deleting process”).
To achieve a correspondingly quick and strong heating of the active material beyond the crystallization or melting temperature, respectively, relatively high currents may be necessary, which may result in correspondingly high power consumption.
Furthermore, the consequence of high heating currents may be that the corresponding cell can no longer be controlled by an individual transistor with a correspondingly small structure size, which may result in a corresponding—possibly strongly reduced—compactness of the respective memory device comprising a plurality of phase change memory cells and appropriate triggering transistors.